Senior Member of Technical Staff

Senior Member of Technical Staff (SMTS) Design Verification Architect

High-Speed Interconnects | PCIe NVMe CXL

Location: Bengaluru, India

Experience: 10+ Years

Role Overview

We are seeking a senior SMTS Design Verification Architect to define and drive the verification strategy for complex high-speed interconnect and memory subsystems used in next-generation AI and HPC silicon platforms.

This role is ideal for a deep technical expert who enjoys system-level thinking, building scalable verification frameworks, and solving the hardest architectural verification challenges while still staying close to hands-on debug.

Key Responsibilities (Architect-Level Ownership)

• Architect end-to-end verification strategy for PCIe, NVMe, and CXL subsystems across SoC and AI accelerator platforms
• Define reusable UVM architecture, VIP integration strategy, coverage models, and performance validation frameworks
• Drive system-level scenarios, including coherency, fabric interactions, and multi-IP traffic stress
• Lead protocol compliance methodology and cross-generation validation (Gen4Gen6 and beyond)
• Partner with SoC architects and RTL leads to shape interconnect and memory architecture decisions
• Own complex bug triage, root cause strategy, and quality sign-off criteria
• Mentor senior DV engineers and raise verification technical standards
• Influence automation, emulation strategy, and scalable regression infrastructure

Core Technical Expertise

• 10+ years of advanced Design Verification experience in SoC/IP environments
• Deep architectural understanding of:
• PCIe protocol and system integration
• NVMe storage subsystems
• CXL coherency, memory pooling, and fabric concepts
• Expert in SystemVerilog, UVM architecture design, assertions, coverage strategy
• Strong experience with emulation, acceleration, and large-scale regressions
• Proven ability to debug system-level, cross-IP failures

Preferred Background

• AI accelerator, GPU, networking, or HPC SoC verification
• Multi-die/chiplet-based system validation
• Post-silicon debug or performance characterization
• Python/CI automation expertise

Why This Role Stands Out

Own verification architecture for industry-leading AI silicon

Shape next-generation interconnect & coherency systems

Work on bleeding-edge protocols at massive scale

About Us:

Silicon Patterns is a specialized engineering services company with deep expertise in pre-silicon and post-silicon design and verification. We deliver end-to-end semiconductor and embedded system solutions covering RTL Design, SystemC Modeling, Emulation, Design Verification (DV), Physical Design (PD), Design for Testability (DFT), and Pre- & Post-silicon Validation helping clients achieve faster, more reliable product development. Headquartered in Hyderabad, with offices in Bangalore and Raipur, and supported by our skilled engineering teams in Malaysia, we serve global clients through flexible engagement models like Time & Materials (T&M), Offshore Development Centers (ODC), Subcontracting, and Build-Operate-Transfer (BOT). Our expertise spans VLSI and Embedded Systems, with a strong focus on Wireless, IoT, and Automotive domains. We also work on advanced technologies including HBM3/3E workloads, AI/ML, GenAI/LLMs, and edge computing. At Silicon Patterns, were committed not only to technical excellence but also to maintaining a strong work-life balance for our teams because great engineering starts with well-supported people.

Website

https://www.siliconpatterns.com