Position:

Job Description:

Principal Accountabilities
* Responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP Tests and Pattern validation w/wo Timing, DFT mode timing  Analysis and sign off.
* Oversee comprehensive DFT plan
* Work with DFT and cross functional teams to architect and implement solutions for Scan and built-in self-test (Memory and Logic BIST) circuitry to test devices in the field

Job Complexity
● Requires in-depth knowledge and experience
● Solves complex problems; takes a new perspective using existing solutions
● Works independently; receives minimal guidance
● Acts as a resource for colleagues with less experience
● Represents the level at which career may stabilize for many years or even until retirement
● Contributes to process improvements
● Typically resolves problems using existing solutions
● Provides informal guidance to junior staff
● Works with minimal guidance

Experience / Education
Typically requires 5–7 years of related experience with a 4 year degree; or 3 years and an advanced degree; or equivalent work experience.

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