Senior Design Verification Engineer

HSIO PHY Verification Engineer (SV/UVM)

Experience: 512 Years

Location: Bengaluru

Company: Tessolve Semiconductor

Job Summary

We are looking for an experienced HSIO PHY Verification Engineer with strong expertise in SystemVerilog (SV) and UVM methodology to join our verification team in Bengaluru. The candidate will be responsible for verifying high-speed interface PHY IPs and ensuring first-pass silicon success.

Key Responsibilities

• Develop and execute verification plans for HSIO PHY IPs (PCIe, USB, MIPI, SATA, SerDes, etc.).
• Build and enhance UVM-based verification environments from scratch.
• Develop SystemVerilog testbenches, sequences, scoreboards, assertions, and coverage models.
• Perform protocol-level and PHY-level verification.
• Debug complex issues at RTL, gate-level, and system-level simulations.
• Work closely with RTL design, analog/mixed-signal, and post-silicon validation teams.
• Drive functional coverage closure and regression management.
• Support emulation/FPGA prototyping if required.

Required Skills

• Strong hands-on experience in SystemVerilog and UVM.
• Experience in verifying HSIO PHY protocols such as:
• PCIe (Gen3/4/5)
• USB (3.x)
• MIPI (D-PHY/C-PHY)
• SATA / Ethernet / SerDes
• Good understanding of PHY architecture and mixed-signal interfaces.
• Experience with assertions (SVA) and coverage-driven verification.
• Strong debugging skills using industry-standard simulators (VCS/Questa/Xcelium).
• Familiarity with regression tools and scripting (Perl/Python/Shell).

Preferred Qualifications

• Experience with Gate-level simulations and STA basics.
• Exposure to low-power verification (UPF/CPF).
• Experience in AMS co-simulation is a plus.
• Knowledge of silicon bring-up and post-silicon validation.

Educational Qualification

• B.E./B.Tech/M.E./M.Tech in Electronics/Electrical/Instrumentation or related field.

Why Join Tessolve?

• Opportunity to work on cutting-edge semiconductor IPs.
• Exposure to global semiconductor clients.
• Collaborative and innovation-driven work environment.
• Strong growth opportunities in advanced PHY technologies.