Senior Analog Layout Design Leads

Were Hiring! Senior Analog Layout Design Engineers / Leads

Locations:

• Bengaluru, India
• San Jose (Bay Area), USA
• Austin, USA
• Eligibility (US Roles): Valid H1B or candidates already in the U.S.

Experience: 5-15 Years

Notice Period: 30 days or less preferred

Greetings from Eximietas Design !

Were expanding our Analog Layout team and looking for talented engineers who are passionate about delivering world-class designs in advanced FINFET technology nodes.

What Were Looking For:

Strong expertise in IR drop , Electromigration , Self-Heating , RC delay , and Parasitic Optimization

Solid understanding of layout impact on circuit performance (speed, area, reliability)

Proven ability to build high-quality layouts under tight constraints

Hands-on experience with Cadence / Synopsys layout tools & flows

Knowledge of PERL/SKILL scripting is a plus

Excellent communication & teamwork skills

Interested Engineers please share your updated resume :

Referrals are greatly appreciatedplease feel free to forward this within your network...!

Best regards,

Maruthy Prasaad

Associate VLSI Manager - Talent Acquisition | Visakhapatnam

Eximietas Design

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