RTL Design Engineer

Job Title: RTL Design Engineer

Work Location: Hyderabad

Experience: 5 Years

Notice Period: Immediate (15 Days Max)

RTL Quality Check

• Perform RTL quality checks including:
• UPF (Unified Power Format) verification.
• CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) analysis.
• Design linting checks
• Collaborate with design teams to resolve violations.
• Experience in LEC is desirable
• Create regression scripts, debug and maintain runs
• Own and manage DJ flow for SoC projects..
• Expertise in SoC-level integration, Strong knowledge of AXI protocol is a plus

Required Skills

• Hands-on experience in ASIC design flows.
• Proficiency in EDA tools (Synopsys, Cadence, Mentor).
• Strong debugging and problem-solving skills.
• Ability to work independently with minimal monitoring.

Preferred Qualifications

• M.Tech or equivalent in VLSI/Embedded Systems.
• Prior experience in large SoC projects.
• Familiarity with scripting (TCL, Perl, Python) for automation.