Lead Engineer

Job Role : Lead DFT Engineer

Job Location : Hyderabad

Experience : 6 to 12 years

Preference : Immediate to 30days

Requirements:

• Strong fundamentals in digital logic design and DFT Architecture concepts
• Proficiency in HDL languages (Verilog / VHDL) for RTL design and analysis
• Solid understanding of VLSI testing principles, including fault models and DFT methodologies
• Hands-on experience with DFT implementations - Scan Compression at IP level, Scan Retargeting at SoC level (Knowledge of SSN is good-to-have)
• Experience with industry-standard DFT and test tools, such as: Tessent TestKompress, Tessent Diagnosis, MBIST tools, RTL and gate-level simulation environments
• Working knowledge of FPGA architectures, design and synthesis flows
• Familiarity with Linux-based development environments
• Scripting skills (Perl,TCL,Python) for automation and productivity enhancement are a strong plus

Qualification:

• Bachelors or Masters degree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field is preferred.
• Formal education or training with a focus on digital design, DFT or test methodologies is desired.
• Tessent Scan, ATPG or MBIST certifications are a plus.

Apply here or share cvs to divya.lakshmi@acldigital.com