Asic RTL Design
ACL Digital
2 - 5 years
Bengaluru
Posted: 29/01/2026
Job Description
Skill : ASIC RTL + Micro architecture
Experience: 5+yrs
Location : Bangalore
Tasks
Responsible for planning and implementing digital design IPs for automotive microcontroller infrastructure IPs / system resources
Derive design micro-architecture from architectural specification and requirements.
Generate complex Digital IP designs , working alone or as part of a larger design team
Insert Design for Test and Design for Manufacturability structures (ScanChains and memory BIST)
Determine and insert safety-related structures to fulfil the required ASIL level
Perform design quality checks by synthesis, structural checks (e.g., lint, CDC, RDC), design for testability, power analysis, etc.
Own and create design-related documentation to comply with relevant safety standards (ISO 26262) and security (ISO 21434)
Skillset
A degree in Electrical Engineering, Computer Science, Physics , or a related technical field
Proven working experience in area- and power-efficient RTL design (VHDL or Verilog) with a natural understanding of how RTL maps to gate-level structures
Knowledge of automotive communication protocols like Ethernet, PCIe, CAN, SPI, SENT
Proven ability to work in a team to undertake a larger design project
Working experience in international and cross-functional technical teams within a multi-cultural environment
Basic knowledge of Safety standards and application , e.g., ISO 26262
Excellent English communication skills ; German language skills are a plus
Deliverables
Synthesizable RTL code , delivered into configuration management system
Quality check reports and KPI reports
Safety analysis and derived work products
Documentation of design implementation
Tools
Tools: Xcelium, FlowFusion, Spyglass, DesignCompiler, LEC, ATPG
SystemVerilog, VHDL
Basic knowledge of scripting languages Perl / Python
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