Senior RTL Engineer

Job Title: RTL Design Engineer (5+ Years Experience)

Location: Noida

Notice Period: Immediate to 15 Days

Job Description:

We are looking for a skilled RTL Design Engineer with 5+ years of experience and strong expertise in RTL integration. The ideal candidate should have hands-on experience in RDC, CDC, and synthesis, along with a solid understanding of SoC design flows.

Key Responsibilities:

• Perform RTL design and integration at subsystem/SoC level
• Handle clock domain crossing (CDC) and reset domain crossing (RDC) analysis and closure
• Work on synthesis, timing analysis, and optimization
• Integrate multiple IPs and ensure seamless functionality
• Debug and resolve design issues across different stages of the design cycle
• Collaborate with verification, physical design, and DFT teams

Required Skills & Expertise:

• Strong hands-on experience in RTL design and integration
• Expertise in CDC, RDC analysis and fixes
• Good experience in synthesis tools and timing closure
• Proficiency in Verilog/SystemVerilog
• Understanding of SoC architecture and design methodologies
• Experience with Lint, STA, and low-power checks is a plus