Principal Software Engineer - Design Verification

Job responsibilities:

• SW Engineers are expected to Develop verification products based on the multiple customer requirements
• Analyze customer requirements and translate them to product enhancements bringing their technical understanding of the customer needs and issues
• Provide active support and guidance to customer issues
• Collaborate with other team members and different functions in the organization such as PV and field

Experience and Technical Skills:

• At least 7 to 12 years of experience with System Verilog, Specman e, VHDL, Verilog
• Working knowledge of embedded C
• Knowledge of protocols such as AMBA, PCI-E, USB, Ethernet, 10 Gig, NVMe etc.
• Understanding of verification methodologies (UVM)
• Prior experience in metric driven functional verification
• Strong programming skills (OOP)
• Background in developing IP, Sub-system, SoC level verification environment with both UVM and SW-driven (embedded c)
• Strong interest and understanding of design and verification methodologies
• Strong problem solving and analytical skills
• UNIX shell scripting

Qualifications

• BTech/BE/MTech/ME or equivalent with Electrical, Electronics & Comm or Computer Science Engineering

Behavioral skills required

• Must possess strong written, verbal and presentation skills
• Ability to establish a close working relationship with both customer peers and management
• Explore what’s possible to get the job done, including creative use of unconventional solutions
• Work effectively across functions and geographies
• Push to raise the bar while always operating with integrity