Verification Team Lead

HIRING | PCIe Verification Team Lead Gen 5 & Gen 6

Location: Bangalore

Experience: 5+ Years

Role: Technical Lead / Lead Verification Engineer

We are looking for a PCIe Verification Lead with strong hands-on expertise in PCIe Gen 5 & Gen 6 to lead complex verification projects and mentor teams.

Key Responsibilities

Lead end-to-end PCIe Gen5/Gen6 verification

Own verification strategy, test planning, coverage & sign-off

Hands-on with System Verilog, UVM

Debug complex protocol-level issues

Mentor and guide junior verification engineers

Collaborate with Architecture, Design, and SoC teams

Must-Have Skills

5+ years in ASIC/SoC Verification

Strong PCIe protocol knowledge (Gen 5 & Gen 6)

SV/UVM, Assertions, Coverage

Experience in leading teams / technical ownership

Exposure to high-speed interfaces is a plus

Good to Have

PCIe compliance / VIP experience

Exposure to CXL is an added advantage

Share your CV at Shalini@siliconpatterns.com