Verification Lead

PFB JD:

5+ Years of experience in IP/soc level verification

Must have Expertise:

1. Grounds up verification environment development using SV/ UVM is a must

2. One of the high speed protocols like PCIe or USB 3 or MIPI

3. Experience in testplanning

4. Experinece in leading a team of 5+ Engineers

5. Proficient in System Verilog and UVM

Big plus to have experience in:

1. TI FPD or ASA or Maxim GMSL protocol standard

2. FuSa verification is a big plus

3. Imaging design that involves CSI, DSI, eDP

4. Experience in effort and schedule estimation, tracking and technical leadership

Good to have experince in:

5. VIP development

6. FPGA

7. AMS Verification