Staff High-Speed SerDes Design Engineer

We are looking for an experienced SerDes Design Engineer to develop next-generation high-speed wireline transceivers and SerDes PHY IPs in advanced nodes.

Responsibilities

• Design TX, RX, CDR, PLL, clocking, DLL, VCO and related high-speed AMS circuits.
• Evaluate topologies to meet power, performance, and area (PPA) goals.
• Perform transistor-level simulations and work closely with layout teams.
• Lead silicon validation, characterization, and debugging.
• Define specifications and collaborate with cross-functional teams.
• Mentor junior engineers and support technical reviews.

Qualifications

• B.E./M.E. in Electrical Engineering or related field.
• 10+ years in SerDes or high-speed AMS design.
• Strong analog/mixed-signal fundamentals and high-speed link knowledge.
• Experience with lab testing, SI analysis, and high-speed debugging.
• Strong problem-solving and communication skills.