Staff Emulation Engineer

Staff Emulation Engineer

Bangalore

Founded in 2023,by Industry veterans HQ in California,US

Location: Greater Bengaluru Area

Company Description

We are looking for exceptional talent and leadership to join , the worlds first company developing Agentic Silicon for powering the future of AI.

Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. We have deep customer engagements across America, Europe, and Asia, and demonstrated functional prototypes to prove our concept and vision.

We are seeking experienced Emulation Engineers with a strong aptitude for working on Emulation Platforms. Candidates should have a deep understanding of system-level aspects of ASIC development and be skilled in emulation testbench and test plan development.

Responsibilities

• Develop and execute emulation test benches and test plans.
• Utilize coding and problem-solving skills to contribute to the functional verification of designs.
• Manage the full life cycle of emulation, from planning to system-level tests.
• Develop platform agnostic methodologies that scale across traditional DV and emulation and post-silicon bringup for functionality, performance etc.
• Collaborate with software and system validation teams to develop and execute test plans on emulation platforms.

Basic Qualifications

• Strong academic background in Electrical Engineering (Bachelor's required, Master's preferred).
• Minimum of 5-10 years experience in verifying and validating complex SoCs for server, and networking applications.
• Proficiency with industry-standard simulators, revision control systems, and regression systems.
• Professional attitude with the ability to prioritize tasks and work independently with minimal supervision.
• Entrepreneurial, open-minded attitude with a customer-focused mindset.

Required Experience

• Proven ability to deploy hybrid techniques, including directed and constrained random testing.
• Experience in stress testing at the system level for bug identification.
• Ability to independently develop test plans and test sequences, generate stimuli, and collaborate with RTL designers to debug failures.
• Strong in Veloce-preferred otherwise in Zebu/Palladium

Preferred Experience

• Proficiency in scripting tools (Perl/Python) for automating verification infrastructure.
• Experience with transactors from third-party vendors and communication protocols such as PCI-Express (Gen-3 and above), Ethernet, DDR4/5

Contact:

Uday

Mulya Technologies

"Mining The Knowledge Community"