SOC/Subsystem - Design Verification Engineer

Greetings! We are looking for highly experienced and passionate SoC / Subsystem Verification professionals to join a high-impact semiconductor program.

Requirement

ACL Digital is hiring Strong SoC / Subsystem Verification Engineers for a engagement in Hyderabad . The role demands deep hands-on expertise in complex SoC and Subsystem-level verification, working closely with architecture, design, and firmware teams on production-grade silicon.

• Experience: 6 to 20 years
• Location: Hyderabad
• Notice Period: Less than 30 days (mandatory)

Skill Set Summary

• Strong hands-on experience in SoC and Subsystem Verification using SystemVerilog and UVM
• Proven expertise in end-to-end verification ownership : testplan, testbench architecture, execution, closure
• Deep understanding of AMBA protocols : AXI4, AHB, APB (protocol checkers, assertions, scoreboards)
• Experience with SoCs involving peripherals such as timers, DMA, UART, SPI, I2C, GPIO, Ethernet, PCIe, or memory controllers
• Strong skills in verification architecture , reusable VIP development, and scalable UVM environments
• Hands-on with assertion-based verification (SVA) and functional/code coverage
• Experience in SoC-level integration verification , interconnects, resets, clocks, power domains
• Familiarity with low-power verification concepts (UPF / CPF) is a strong plus
• Experience in regression management, debug, and root-cause analysis on complex failures
• Working knowledge of lint, CDC, RDC tools and methodologies
• Ability to collaborate closely with design, firmware, validation, and architecture teams

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