Senior Principal Engineer

You will be a part of the Automotive and Industrial Solutions Group which is a global leader in the design, manufacturing and marketing of Microcontrollers (MCUs) and Embedded Processors in the Automotive, Consumer and Industrial markets

Job Description

• Should have expertise in 14nm / 10nm / 7nm / 5nm process nodes and experience of more than 12 years
• Mandatory to have tape-out experience as STA block owner/Lead
• Thorough knowledge and understanding of static timing analysis concepts
• Should have a strong understanding of Constraints and able to modify and build the constraints with collaboration of RTL and DFT team
• Well versed with the Block level / SOC level timing closure (STA) methodologies, ECO generation and predictable convergence
• Should have good exposure to high frequency multi voltage design convergence
• Full exposure to all aspects of STA including: Timing, DRCs, Sanity Checks, Annotation issues, Multivoltage STA flow enablement, Noise, Crosstalk etc
• Well versed with Tcl/Perl scripting
• Work closely with the block owners to achieve timing convergence through systematic fixes and minimal manual effort
• Close interaction with worldwide team members (IO timing etc)
• STA flow automation exposure will be an added advantage
• Minimum Qualification : Master/Bachelor's Degree in Electrical/Electronic EngineeringMaster/Bachelor's Degree in Electrical/Electronic Engineering
• Self-motivated and Good communication skill

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