Senior PHY / SDR Modem Engineer

Experience Required: 815 years

Role Overview

We are seeking a Senior PHY / SDR Modem Engineer to strengthen our in-house SDR modem development and validation efforts. This role is focused on physical-layer feature development, bit-true validation, FPGA-centric implementation, and rigorous testing on custom-built SDR hardware.

You will work closely with an experienced system architect, who owns the overall modem and hardware architecture. Your responsibility will be to translate architectural intent into correct, efficient, and field-ready PHY implementations, and to ensure modem features behave as expected on real hardware.

This is a deep-technical role intended for engineers who enjoy building and validating real modems, not just simulations.

Key Responsibilities

PHY & Modem Feature Development

• Develop, enhance, and maintain PHY-layer features for SDR modems, including:
• Modulation and demodulation chains (BPSK/QPSK/QAM/OFDM/SC-FDMA)
• Synchronization (time, frequency, phase)
• CFO / RFO estimation and correction
• Channel estimation, equalization (ZF, MMSE, MRC)
• Framing, pilots, and reference signals
• Implement and validate frequency hopping, TDD operation, and adaptive PHY features as defined by the architect.

Bit-True Modeling & FPGA-Centric Implementation

• Develop bit-true reference models using MATLAB / Simulink / System Generator.
• Support FPGA implementation of PHY blocks through:
• Clear algorithm specifications
• Fixed-point modeling and word-length optimization
• Generation and validation of golden vectors
• Collaborate with FPGA/RTL teams during integration, bring-up, and debug.

(Hands-on RTL coding is not mandatory, but strong FPGA and fixed-point understanding is required.)

Hardware Bring-Up & Validation

• Validate PHY features on custom SDR hardware platforms (ADC/DAC + RF front-end + FPGA).
• Debug issues related to:
• Timing and synchronization
• Phase coherence and drift
• Hardware non-idealities (quantization, clipping, RF impairments)
• Perform BER / BLER / EVM / SNR characterization across operating conditions.

Testing, Debug & Support

• Analyze failures observed in lab tests, HIL setups, and field trials.
• Correlate system-level KPIs (BER, BLER, SNR, RSSI, CQI) with PHY behavior.
• Work closely with the architect to refine algorithms based on test results.
• Support regression testing when new features or hardware revisions are introduced.

Required Technical Skills

Core PHY Expertise

• Strong fundamentals in digital communications and DSP.
• Hands-on experience with modem PHY development, including:
• OFDM-based systems
• Channel coding (Convolutional, LDPC implementation or validation level)
• Synchronization and estimation techniques
• Proven ability to take PHY designs from simulation to real hardware.

Tools & Technologies

• MATLAB / Simulink (advanced)
• Python (modeling, automation, test scripts)
• Xilinx System Generator / FPGA-based PHY workflows
• C / C++ (PHY integration, performance-critical modules)
• Lab tools: spectrum analyzer, signal generator, oscilloscope (working knowledge)

Systems Knowledge

• Fixed-point DSP implementation
• FPGA-based datapath concepts (streaming, buffering, latency control)
• SDR hardware fundamentals (ADC/DAC, RF front-end, sampling clocks)
• Embedded/Linux-based test or control environments (working knowledge)

Desirable / Strong Plus

• Prior work on tactical radios, defence SDRs, or indigenous communication systems
• Experience with frequency hopping and anti-jam PHY techniques
• Exposure to HF/VHF/UHF radio systems
• Bit-true support for RTL verification and SoC bring-up
• Systems taken from prototype to field deployment

Education

• B.Tech / M.Tech / PhD in:
• Electronics / Communications Engineering
• Signal Processing
• RF / Wireless Systems

Ideal Candidate Profile

• Deeply technical engineer who enjoys PHY correctness and modem behavior.
• Comfortable working under architectural guidance rather than defining architecture.
• Detail-oriented, methodical, and disciplined in testing and validation.
• Confident debugging complex PHY issues across simulation, FPGA, and hardware.

Why This Role

Work on serious, in-house SDR modem hardware not COTS radios. Collaborate directly with an experienced modem and hardware architect. Own the quality, correctness, and robustness of PHY features. Contribute to deployable, mission-critical communication systems