Senior EMIR & CAD Engineers

Eximietas Design is Hiring | EM/IR/ESD Lead & CAD/Methodology Lead (3DIC / 2.5D)

Work Locations: Bengaluru, Hyderabad, Pune & Ahmedabad.

Experience: 5 to 15years

Eximietas Design is expanding its semiconductor team and hiring for two critical technical roles supporting advanced AI and multi-die SoC programs.

1.Physical Design EM/IR/ESD Lead

Own silicon reliability and power integrity end-to-end.

Key Focus Areas:

EM/IR signoff (static & dynamic IR-drop, EM analysis)

SoC-level PDN architecture & power integrity strategy

ESD / Latch-Up implementation & Calibre PERC signoff

Expertise in Ansys RedHawk SC and/or Cadence Voltus

Advanced nodes (7nm, 5nm & below)

Strong scripting (Python/Tcl/Perl)

2.CAD & Methodology Lead (3DIC / 2.5D)

Build and enable scalable implementation and signoff flows for multi-die systems.

Key Focus Areas:

3DIC / 2.5D flow development (chiplets, interposers)

Cross-die timing, power, IR/EM, ESD methodologies

Thermal / CFD / multiphysics enablement

Exposure to Cadence Integrity 3D-IC, Synopsys 3DIC Compiler, Celsius, Icepak

Strong automation and scripting expertise

These roles require hands-on experience in advanced-node implementation and signoff, with strong cross-functional collaboration skills.

Interested candidates can apply, refer, or reach out directly: pragathi.ny@eximietas.design