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Senior EDA Engineer

CareerXperts Consulting

5 - 10 years

Bengaluru

Posted: 12/01/2026

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Job Description

About the Role

Transforming analog chip design using GenAI-powered automation . We are looking for a Senior EDA Engineer with strong hands-on expertise in Cadence Virtuoso, SKILL scripting, and Open Access (OA) to help build scalable, intelligent design flows for next-generation analog IC design.

This role will work closely with AI, EDA, and platform engineering teams to integrate and automate schematic, layout, and PDK/CDK workflows within an AI-driven design copilot.

Key Responsibilities

  • Develop, maintain, and optimize analog/mixed-signal IC design flows in Cadence Virtuoso
  • Design and enhance SKILL scripts for schematic, layout, verification, and environment automation
  • Manage and customize CDF parameters for foundry PDK/CDK libraries
  • Work with Open Access (OA) database APIs using C++, Python, or Tcl to manipulate schematic and layout data
  • Integrate and validate foundry PDK/CDK devices, pCells, symbols, DRC/LVS decks, and simulation models
  • Troubleshoot PDK, OA database, schematiclayout synchronization, and environment issues
  • Build reusable automation tools and maintain clear technical documentation
  • Collaborate with AI and software teams to embed EDA workflows into GenAI copilot platform

Required Skills & Experience

  • 38 years of hands-on experience with Cadence Virtuoso analog/mixed-signal design flows
  • Strong proficiency in SKILL scripting
  • Experience working with Open Access (OA) database APIs
  • Solid understanding of foundry PDK/CDK structures , pCells, and verification flows
  • Experience automating schematic, layout, and library workflows
  • Strong Linux/UNIX command-line and scripting skills
  • Familiarity with version control systems (Git / SOS or similar)
  • Excellent communication skills and ability to work in a fast-paced startup environment

Preferred Qualifications

  • Prior experience with Cadence or leading semiconductor companies
  • Exposure to Spectre, ADE, and analog verification flows
  • Understanding of semiconductor process technology and device physics
  • Interest or experience in AI/ML-driven design automation

Location: Bengaluru (Work from Office)

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