Senior DFT Engineer

We are seeking an experienced, highly motivated and high-caliber individual with below expertise. Does this sound like a good role for you?

• Senior Staff DFT Engineer (R&D Engineering)
• Location: Bangalore
• Experience: 8yrs to 15yrs
• BE/BTECH/Masters degree in Electronics, Computer Science, or equivalent
• 8 years of hands-on experience in the DFT domain
• Strong understanding of DFT, scan architectures, and testgeneration concepts
• Handson experience with Verilog and logicsimulation debug
• Proficiency in C/C++ programming
• Openness to using AI tools to boost productivity
• Responsibilities:
• Contribute across the entire DFT flow: RTL, netlist, ATPG, and logic simulation
• Analyze DFT IP behavior, debug logic issues, and deliver robust fixes
• Enhance patterngeneration workflows for better performance and QoR
• Develop C/C++ components for pattern processing, automation, and data handling
• Work closely with multisite R&D teams to ensure smooth flow integration
• Use AIbased tools to accelerate debugging, code comprehension, and analysis

Please share your updated CV with taufiq@synopsys.com or refer those who would like to explore this opportunity.

• Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.