Senior Design verification/Lead

Desired Competencies (Technical/Behavioral Competency/Skills)

Must-Have**

(Ideally should not be more than 3-5)

Design verification in synopsys or cadence or siemens flow. Effectively collaborate and communicate across disciplines and geographically spaced teams. Collaborate with design/RTL, DFT, PD domains for smooth execution. Need to actively plan for the parallel execution of multiple programs and maneuver through the ever-changing landscape of project requirements which are at times driven by the market dynamics. Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements.

Good to Have

Low power verification experience. Strong understanding the design and verification life cycle. Experience with x86, ARM or any other industry standard microprocessor ISA. Experience with Cache, Coherency and Data-Consistency verification. Experience in clocking, reset, power-up sequences and power management verification. Understanding of low power design verification techniques is a plus. Knowledge of, or experience in, functional design/RTL and physical design flow is highly desired.