Senior Design Verification Engineer

Position Summary

Role and Responsibilities

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. 

Roles and Responsibilities

Independent Verification Ownership of  IP DV.

·        Collaborating with various across functional team at multiple geo location as part of execution.

·        Expected to work hands on to close all aspects of  verification activities including Testplan creation, building testbenches  based on standard DV methodology , developing DV  Infrastructure(Coverage/Regression/Simulation Scripts) 

Must have experience in developing test benches for IP/Subsystems/SoC.

·        In depth  knowledge and hands on experience in the execution of verification of SoC/SS/IP DV

·        Previous experience of independently driving IP DV projects from Ability to lead a       team by providing technical guidance as well as by part of execution by  debugging and SoC architecture understanding capabilities

·        Strong hands on experience with common verification tools and methodology including  UVM/System Verilog/CDV/MDV, DV signoffs. 

·        Must have a  strong domain expertise in one or more following areas - CPU/Cache Coherency/CPU Pipeline/Cache/Branch Prediction/MMU

·        Experience  in Hybrid testbenches(SV, C/C++, Python) and  C/C++ based CPU vectors/stimulus based      verification is desirable. 

·        Experience/Exposure to RISC-V Core DV or any other Core DV s highly preferred. 

Experience - 7-10 Years 

Qualifications

• B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

Skills and Qualifications

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