Senior Design Verification Engineer

Senior Design Verification Engineer: SOC Focused [Experience Level 10+]

Job Description

We are seeking a SoC Verification Engineer to work on end-to-end data-path verification for high-performance ARM-based SoCs. This role focuses on validating correctness, coherency, performance, and scalability of data movement across PCIe and CXL fabrics, from IP blocks through interconnect to CPUs and memory, at chip and multi-chip system levels. This is full-chip, cross-IP, real-silicon mindset verification.

Key Responsibilities

• Validate PCIe/CXL Data path at full chip and multichip level.
• Validate CXL data flows, Hostdevice coherency interactions
• Execute SoC-level DV plans for flows pertaining to PCIe / CXL
• Implement:

o UVM-based system tests including mid-transaction reset, contention scenario

o Scoreboards and data integrity checks under high throughput, concurrent traffic

• Debug complex failures using:

o Waveforms

o Transaction traces

o Firmware interaction

• Collaborate with RTL, architecture, and firmware teams

Required Skills & Experience

• Strong knowledge of:

o PCIe protocol (transaction & data path focus)

o CXL (io/cache/mem)

• Proficiency in:

o SystemVerilog / UVM

o Transaction-level verification

Preferred Qualifications

• Multi-chip / chiplet system experience
• Exposure to real workloads (storage, networking, AI accelerators)