Senior Design Verification Engineer

Job Title: Senior Verification Engineer

Experience: 5+ Years

Location: Hyderabad

Notice Period: Immediate to 30 days

Job Description

We are looking for experienced Senior Verification Engineers to work on UVM-based verification of MIPI PHY and Controller IPs . The role involves developing and maintaining robust verification environments, debugging complex protocol and timing issues, and collaborating closely with emulation and post-silicon teams to ensure high-quality IP delivery.

Key Responsibilities

• Develop and execute UVM-based verification environments for MIPI PHY/Controller IPs
• Work hands-on with MIPI VIP for protocol validation
• Implement CRV, functional and code coverage, assertions (SVA), scoreboards, and checkers
• Debug complex protocol-level and timing-related issues
• Collaborate with emulation and post-silicon validation teams
• Analyze failures using industry-standard debug tools (Verdi/DVE)

Must-Have Skills

• Strong knowledge of MIPI standards (CSI-2 / DSI / D-PHY / C-PHY / A-PHY any)
• Proficiency in SystemVerilog and UVM
• Hands-on experience with coverage, SVA, and debugging methodologies
• Excellent debugging, analytical, and communication skills

Interested Engineers, kindly share with me your updated profile to