Senior Design Verification Engineer - Memory Controller

Hi,

Position: Senior Design Verification Engineer - Memory Controller

Job Overview

As a Senior Design Verification Engineer - Memory Controller, you would responsible for one or more functional units of the DRAM Memory Controller while working closely with architecture and design teams to meet all functional and performance requirements.

Responsibilities

• Verify designs for DRAM (e.g., LPDDR4/5, DDR4/5, HBM) protocol compliance and functionality through rigorous testing and simulation.
• Develop and execute design verification plans to ensure functional correctness and compliance with specifications.
• Perform power-aware simulations and ensure low-power design compliance using UPF (Unified Power Format) standards.
• Develop and maintain reusable verification environments, including testbenches and test cases, using industry-standard methodologies (e.g., UVM).
• Debug functional errors in the RTL model using simulation and debug tools with an in-depth understanding of the DRAM protocol and memory controller microarchitecture.
• Define and implement functional coverage.
• Perform coverage analysis and identify testing gaps.

Please share your resume to jayalakshmi.r2@ust.com

Regards,

Jaya