RTL Designer

#Urgent_Opening_for_Canvendor

#Hiring : RTL Designer (4-8 Years Experience) |Bangalore - Hyderabad | Immediate Joiners Preferred

Location: Bangalore / Hyderabad

Experience: 4+ Years

Notice period: Immediate to 30days

#Key_Requirements :

• SoC / IP RTL Design Engineer with 4 8 years experience
• Expertise in writing RTL in Verilog and System Verilog
• Hands-on experience in design static checks like Lint, CDC, RDC, CLP, UPF
• Hands-on experience in integration of IP, chip IO integration
• Any candidate with PCIE/USB/Ethernet experience is good.
• Working knowledge of GIT is preferred
• Excellent analytical, and problem-solving skills
• Should have good understanding of SoC design flows

If interested kindly share your updated CV to