Risc-V design verification engineer
UST
2 - 5 years
Bengaluru
Posted: 08/01/2026
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Job Description
Hi All,
Key Skills : SV-UVM, RISC-V, Processor/Firmware based verification
Required experience : 6 to 8 yrs
Work location : Hyderabad/ Bangalore
Please share your resume to
Regards,
Jaya
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