Principal Digital Verification Engineer

Principal Digital Verification Engineer

Location: Bengaluru

About Omni Design Technologies

Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT).

Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts.

Principal Digital Verification Engineer

Bangalore

Engineering Digital Circuit Design /

Full-time /

Hybrid

We are looking for an experienced digital verification engineer, who is capable of driving the required verification flows for our mixed-signal designs. The ability to work closely with rtl design team and the analog team, and to develop detailed verification flows, is a key feature of this role!

Qualifications

• You will be part of a Verification Team.
• You will be responsible for driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases.
• You will be responsible for analysing Code Coverage, Functional Coverage and Assertions.
• Use industry standard tools, methodologies.
• Solid experience in verification of complex SoCs.
• Expertise in SoC Verification using SV and Verilog. Knowledge of UVM is a plus.
• Expertise in Test Plan creation and Verification technologies like Code Coverage, Functional coverage, assertion based verification.
• Verification experience in complex datapath, DSP based ASICs is highly desirable.
• Good knowledge in gate-level simulation, and Scripting languages like Python, TCL.
• Excellent debugging and problem solving skills.
• Strong communication skills.

Education and Experience

• B.E./B.Tech./M.E./M.Tech in VLSI
• Minimum of 8-12 years of working experience in Digital Verification/Formal Verification flow of a product company.
• Candidate must have working experience System Verilog/UVM based verification flow.

Contact:

Uday

Mulya Technologies

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