Principal CAD HW/Design/DV Engineer

Bangalore

Founded in 2023,by Industry veterans HQ in California,US

Location: Greater Bengaluru Area

Company Description

We are looking for exceptional talent and leadership to join , the worlds first company developing Agentic Silicon for powering the future of AI.

Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. We have deep customer engagements across America, Europe, and Asia, and demonstrated functional prototypes to prove our concept and vision.

Principal CAD HW/Design/DV Engineer [Experience Level 10+]

We are looking for a CAD Hardware Engineer with strong RTL Design and Design Verification expertise to own and scale verification infrastructure across simulation and emulation environments. This role is critical to ensuring tool flow stability, performance, and release readiness for large-scale hardware programs. The engineer will work closely with RTL/DV teams and EDA vendors to drive productivity, reliability, and continuous improvement.

Key Responsibilities

• Own and maintain verification infrastructure sanity across RTL, DV, firmware, and system-level flows
• Monitor and debug daily simulation and emulation regressions, ensuring rapid triage and resolution
• Manage release tagging, build readiness, and flow signoff support
• Partner with EDA vendor to improve compile time, run time, and tool performance
• Own and maintain Makefiles, build systems, and regression automation
• Maintain and optimize testlists, regression configurations, and execution strategies
• Maintain firmware sanity testing and integration with verification environments
• Manage Git repositories, CI/CD pipelines, and verification automation workflows
• Proactively monitor and manage disk usage and storage resources to ensure uninterrupted regressions

Required Qualifications

• Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field
• Strong experience in RTL design and/or Design Verification
• Hands-on experience with simulation and emulation tool flows
• Proficiency with Makefiles, scripting (Python/Perl/Bash/Tcl), and automation
• Solid experience with Git, branching, release management, and CI/CD systems
• Proven ability to manage large-scale regressions and complex verification environments

Preferred Experience

• Direct experience working with Siemens EDA tools
• Familiarity with UVM-based verification methodologies
• Experience supporting firmware bring-up and FW sanity flows
• Exposure to compute farm and resource management environments

Core Competencies

Verification Infrastructure CAD Tool Flows Regression Management CI/CD Automation EDA Performance Optimization Build & Release Engineering Resource & Disk Management

Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

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