Physical Design Walkin Drive 21st Feb Bangalore

Physical Design Walkin Drive 21st Feb Bangalore

Exp- 6 to 15years

Location- Bangalore

JD

• SoC Physical Design Lead:
• Should have in depth experience in RTL to GDS-II, including Floor-plan, place and route, CTS, Power planning, Timing ( Time budgeting at block level, sub-system and Top level), timing closure, Physical verification
• SoC level RTL to GDSII implementation including partitioning experience
• High speed blocks integration and Timing Budgets
• Clock Tree methodology across the SoC top and Subsystems.
• Overall timing convergence across modes and corners including DFT.
• SoC level Power planning strategy and overall power convergence and DRVs
• Strong power estimation and analysis
• Vector based SoC level Power estimation and Analysis of various workloads using PTPX
• Power estimation of various subsystems such as CPU and XPU and doing power roll-up at SoC level.
• Identify the areas of key power roll-up challenges at each Subsystem and SoC level
• Power estimation with vector based model.
• Total number of resources: 6-8 including the technical lead.