Physical Design Engineer

We are looking for a Physical Design Engineer to work on endtoend ASIC/SoC block implementation.

Key Responsibilities:

• Handle floorplanning, timing constraints, synthesis, formal verification, clock tree, routing, extraction, and timing closure.
• Work on blocklevel Place & Route from netlist to GDS.
• Partner with design teams to troubleshoot issues and suggest improvements.
• Manage timing budgeting across teams and ensure accurate STA closure for all corners and modes.
• Independently generate ECOs and ensure signoff quality for DFT, signal integrity, physical verification, and DFM.

Experience: 4+ years

Location: Hyderabad/Bangalore/Noida/Ahmedabad/Pune/Chennai (On-site only)

Role: Physical Design Engineer