Opening for FPGA Validation Engineers and Leads - Hyderabad
UST
5 - 10 years
Hyderabad
Posted: 20/12/2025
Getting a referral is 5x more effective than applying directly
Job Description
Hi All,
FPGA validation engineers with experience in PCIe 4/5, DDR 4/5 or USB3
-Hands on experience working with DSO and Logic Analyzers
-Leads and senior members need board level debugging knowledge
-Some of the team members should be proficient with embedded c and RTL coding.
-Basic knowledge on ARM Cortex-M3 or Risc-V will be helpful
Please share your resume to
Regards,
Jaya
Services you might be interested in
Improve Your Resume Today
Boost your chances with professional resume services!
Get expert-reviewed, ATS-optimized resumes tailored for your experience level. Start your journey now.
