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Manager-Synthesis

SmartSoC Solutions Pvt Ltd

5 - 10 years

Bengaluru

Posted: 23/12/2025

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Job Description

TITILE: Manager Synthesis


Location: Bangalore/Hyderabad


EXPERIENCE: 12+ years with people management experience including formal verification


ABOUT COMPANY:

SmartSoC Solutions is a leading Product Engineering company with specialization in Semiconductor, Embedded, Artificial Intelligence and Automotive domains. We enable our clients to design and build next-generation products, with a focus on Innovation.

Our expertise is in SOC Design & Verification, Physical Design & Verification, Design for Test DFT), FPGA Design & Emulation, Analog Design & Layout, Artificial Intelligence, Data Science, Machine Learning, Deep Learning, Data Analytics, IoT, M2M, ATMP services, Product Engineering, Digital Solutions (Web, Mobile, Cloud, Custom Applications), Infrastructure Management, Network and Cyber Security.

Our niche skill pool of 1400+ Scientists & Engineers are doing exceptional work across offices in multiple cities in India, USA, Sweden, Finland, South Korea, Malaysia, Canada and Israel. We are continuously expanding our global presence. We follow world-class Engineering practices and Standards with an unwavering focus on disruptive innovation!


ROLES AND RESPONSIBILITIES:

Lead synthesis and formal verification team supporting multiple concurrent chip programs

Own synthesis deliverable quality and schedule commitments for all projects

Establish synthesis and formal verification methodology standards and guidelines

Manage team composition, hiring, and skill development to meet organizational needs

Conduct performance management including goal setting, reviews, and career development

Coordinate with cross-functional teams to ensure synthesis deliverables meet downstream requirements

Manage synthesis and formal verification tool portfolio, licensing, and vendor relationships

Drive quality improvement initiatives and establish metrics for synthesis efficiency

Provide technical direction for complex synthesis challenges and formal verification strategies



Contact:

Sumit S. B.

Mulya Technologies

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