Lead Physical Design (PD) Engineer

Were Hiring Lead Physical Design (PD) Engineer

Looking for an experienced Lead Physical Design Engineer with strong expertise in Full Chip Implementation using Cadence Innovus and hands-on experience in advanced technology nodes (<7nm).

Location: Hyderabad

Experience: 8 12 Years

Notice Period: Immediate to 30 Days Preferred

Key Skills Required

Full Chip Physical Design Implementation

Cadence Innovus (Mandatory)

Floorplanning, Placement, CTS, Routing & Timing Closure

Advanced Nodes (7nm / 5nm / Below)

High-Speed SoC Design

Strong collaboration with RTL, STA, DFT & Verification teams

PPA Optimization (Performance, Power, Area)

Why This Role?

Work on cutting-edge semiconductor technologies (<7nm)

Opportunity to lead complex SoC/ASIC physical design projects

Collaborate with global engineering teams

Strong technical growth in advanced node chip design