Lead DFT Engineer

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Job Description:

The position requires an energetic, proactive, self-starting person, who is able to lead and coordinate full chip DFT task and work closely with other DFT engineers to explore new methodologies. You must possess strong technical knowledge in the area of design-for-test (DFT).Design for Test Engineer to perform any of the following ASIC design tasks:- Develop best in class, highest quality DFT methodologies for all design teams in meeting all test requirements & silicon quality standards- Implement/design/validate all DFT RTL/IP, required by all designs.- Drive latest DFT tools to produces highest quality DFT RTL/IP.- Drive ATPG generation/validation.- Work with RTL design, test engineering teams to implement highest quality DFT implementation.- Verify chip design for all DFT requirements, this includes DFT functional verification, DFT coverage verification and static timing analysis.- Static Timing/Noise/Coupling Analysis for test modes at chip level.- Generating clear documentation & easy to use scripts to support DFT flows.- Evaluation of tools in the development of DFT flows.- Responsible for day to day coordination of DFT design activity and resources, in meeting project schedules.- work with ATE test engineers to debug production test patterns

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

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