Layout Design Engineer

Analog Layout Design Engineer

Hyderabad

About Us

We are a technology consulting company delivering best-in class Chip Design Services.

Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow.

Chip Design Services

Analog IP Design

Foundation - OpAmp, Bandgap

IOs - GPIO, I2C, LVDS

Clocking - PLL

Power - LDO

SoC Design

RTL Design, Integration, Lint/CDC/RDC, UPF

IP/SoC UVM Verification

PPA, Synthesis, Constraints Management

Physical Design, Timing Closure, ECOs

Sign-off - Timing, Power, EM/IR, DRC/LVS/ERC

Analog Layout Design Engineer with 3+ years of relevant work experience

You will be doing Analog Layout in advanced process technologies, serving global Semiconductor product MNC clients.

What you get:

• Inducted in the advanced Analog VLSI projects
• Get an opportunity to work with clients that are world-class VLSI MNCs

Skills:

• Hands-on knowhow in analog and mixed-signal layout techniques and experience with Cadence Layout tools (Virtuoso) and Mentor Graphics verification tools (Calibre)
• Experience in Custom Analog Layout (one or more) of I/O, Amplifiers/OPAMP circuits, ADCs/DACs, LDOs, Bandgaps & Bias Circuits, Temperature Sensor, Oscillators
• Physical Verification ( LVS, DRC, ERC, ANT with Calibre)
• Ability to recognize and correct problematic circuit and layout structures
• Knowledge of relevant device physics, matching techniques, ESD/Latchup mitigation techniques, circuit parasitic extraction & reduction, VXL compliance etc., is expected
• Ability to closely and independently work with Analog Designers to solve performance and area challenges

Traits:

• Quick learner with excellent interpersonal, verbal/written communication, problem-solving, and decision-making skills
• Adaptable, Flexible, Global Approach/Synthesis, Creative
• Willing to work on customer site for deployment and support

Contact: Uday Bhaskar

Mulya Technologies

"Mining the Knowledge Community"

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