IP Design Verification Engineer
LanceSoft, Inc.
2 - 5 years
Pune
Posted: 19/02/2026
Job Description
Job Title - IP Design Verification Engineer
Job Location - 1st Priority -Pune , 2nd priority - Noida , Last priority - Bangalore
Project Duration - 1 + Year
Experience Range - 5+ Years in IPs Verification
Job Description -
We are looking for highly skilled IP Design Verification Engineers to develop and execute robust verification solutions for complex semiconductor IPs. This role requires strong hands-on expertise in SystemVerilog and UVM, with the ability to drive verification activities from specification to sign-off.
Key Responsibilities
Develop verification environments, testbenches, and test cases from scratch
Drive IP-level verification from spec understanding to sign-off
Debug and resolve complex issues using industry-standard simulators
Work closely with cross-functional teams in a fast-paced environment
Required Qualifications
Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field
515 years of hands-on experience in Design Verification
Strong proficiency in SystemVerilog
Solid hands-on experience with UVM
Experience verifying one or more of the following IPs:
Interconnects (AXI, AHB, APB)
Memory Controllers
High-Speed Interfaces
Strong debugging skills using simulators such as VCS, Questa, and Xcelium
Ability to work effectively in a dynamic, fast-paced environment
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