Job Details:

Job Description:

Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications:

Responsibilities

• Develop detailed test plans, coverage strategies, and verification metrics

• Drive adoption of best practices and continuous improvement in verification flows

• Oversee development of UVM-based testbenches, constrained-random stimulus, and coverage closure

• Manage regression infrastructure and ensure timely milestone completion

• Work closely with design, architecture, and post-silicon teams to resolve issues and optimize product quality

• Partner with cross-functional teams to ensure seamless integration and verification sign-off

• Champion adoption of formal verification, emulation, and automation techniques

• Explore AI/ML-driven solutions for coverage analysis, bug triage, and productivity improvements

• Ensure compliance with industry-standard verification practices and maintain high-quality standards

• Demonstrate innovation in verification processes, including AI/ML-driven verification or developing custom automation scripts

• Evaluate new verification technologies and incorporate them to continuously improve efficiency and effectiveness

• Foster a culture of innovation, accountability, and technical excellence within the team

Education Requirement:
Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 7+ years of industry work experience, or-
Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6+ years of industry work experience, or-

PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 5+ years of related work experience.

Minimum Qualifications:

7+ years of experience in relevant Pre-Silicon validation position having gone through multiple project cycles to gather in-depth know how.
Solid work experience in developing System Verilog/UVM based testbench for IP, subsystem or SoC level validation.
Solid programming skills in Verilog, System Verilog, UVM, and Python.
Knowledge of advanced computer architecture and micro-architecture concepts.
Experience with writing directed and random test cases including develop and maintain test plans, test cases.
Experience with design verification and validation methodologies and strategies.
Work closely with architecture, design and verification teams to ensure successful tape out
Participate in design and verification reviews, technical discussions and provide technical guidance
Excellent communication skills and a team player.
Able to work independently in a fast-paced team and environment.

Desired Requirements-
Proficient in validating and debugging NOC, Data path, Interconnects, Clock and resets, Power management designs.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

IP Design Verification Engineer

intel

Job Description