Exp: 4-8 years;

FPGA STA knowledge along with tools like Vivado.

Experience on FPGA platforms like AMD(XILINX)/Altera.

Expertise in digital hardware designing using Verilog on large AMD(Xilinx)/altera FPGAs

Experience in scripting language like perl, python and tcl

Working experience on Linux.

Ensure to complete design and timing verification tasks within allotted timelines.

Ability to work individually and in a team

Design, implementation, test, integration, and delivery of system level digital designs for FPGA blocks timing verification

Perform task of debugging design timing related issues on different FPGA families

Perform the work of manifold segmentation of the FPGA designs.

Run internal scripts for performance testing and update scripts when necessary

Run Software test cases on emulator and enable different debug options

Experience with PCIe4 , USB3DDR4

Experience with Speed Bridge Integration and perform real time testing.

Work closely with the Verification/SW teams.

Perl/Python scripting is a plus

Qualifications

FPGA Design Engineer