DFT Lead, WFO ,7+ Years, Immediate Joiners

Job Title: DFT Lead

Location: Bangalore, India

Position: Permanent

Work Mode: Work From Office (5 Days)

Notice Period: Immediate

Experience: 7+ Years

About the Role

We are looking for a highly skilled DFT Lead with extensive hands-on experience in Design-for-Test (DFT) to lead end-to-end implementation, verification, and debug of digital designs. The role involves close collaboration with RTL, Physical Design, and Verification teams, ensuring high-quality deliverables and efficient test strategies for both digital and analog IPs.

Key Responsibilities

• Lead end-to-end DFT implementation at block and top levels, including SCAN, MBIST, LBIST, BSCAN, and IJTAG
• Perform hierarchical scan insertion and complete ATPG flow, including coverage analysis, pattern generation, and debug
• Integrate MBIST and verify RTL-level DFT logic
• Conduct LBIST coverage analysis and gate-level simulation (GLS) enablement
• Define and implement IEEE 1149.1 JTAG & IJTAG architecture
• Conduct DFT verification, lint checks, and equivalence checks
• Develop ATE patterns and provide silicon bring-up support and post-silicon debug
• Understand analog IP test strategies and integration requirements
• Manage multiple designs and ensure timely, high-quality deliverables
• Collaborate with cross-functional teams for design, verification, and implementation

Mandatory Skills & Tools

• Strong hands-on experience with SCAN, MBIST, LBIST, BSCAN, IJTAG, and IP test modes
• Proficiency with EDA tools such as Tessent, Genus, Fusion Compiler, VCS, Conformal/Formality, SpyGlass
• Strong ATPG coverage analysis, DFT debug, and verification skills
• Scripting skills in Perl, TCL, and/or Python
• Strong understanding of analog IP test strategies
• Excellent communication, leadership, and cross-functional collaboration skills

Qualifications

• B.E./B.Tech/M.E./M.Tech in ECE, EE, VLSI, Computer Engineering, or related disciplines
• Minimum 7 years of hands-on experience in DFT

Why Join

• Work in a challenging, high-impact role in VLSI and semiconductor design
• Collaborate with experienced cross-functional teams
• Opportunity to lead DFT initiatives for cutting-edge IPs and SoCs
• Permanent position with Bangalore-based office, 5-day workweek

Interested candidates may share their updated resume at pragya@helloworkconsultants.com. Immediate joiners will be given preference.