DFT Engineer

About Insemi:

InSemi is growing expeditiously and with a team of 1000+ technology specialists. We provide end-to-end semiconductor design services including RTL & ASIC Design, Physical Design, STA, Verification, DFT, Circuit Design & Layout, FPGA, Foundation IP design, PSV, and Emulation.

Location : Bangalore, Chennai

Notice Period: Immediate to 90 Days

Required Skills & Experience:

-Strong experience in DFT Scan insertion and ATPG at IP and SoC levels with 5+ Years

-Hands-on experience with ATPG timing and no-timing simulations.

-Proficient in performing basic unit-level verification using simulations.

-Experience in Scan/ATPG pattern generation, test flow development, debug, execution, and test characterization.

-Hands-on experience in MBIST integration, including:

1. Memory repair techniques (BIRA/BISR)

2. Fuse/OTP-based repair flows

Good to Have:

-Experience with industry-standard DFT tools (Tessent/DFT Compiler/Modus)

-Knowledge of memory fault models and March algorithms

-Experience in SoC-level DFT integration and debug

-Scripting skills (TCL / Perl / Python)

-Silicon bring-up or production test support experience