DFT Engineer
ACL Digital
2 - 5 years
Hyderabad
Posted: 08/01/2026
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Job Description
Job Role : DFT Engineer
Location : Hyderabad
Experience : 3 to 5 years
Responsibilities:
- Spyglass debug and coverage correlation.
- Scan-stitching runs.. Debug DRC / other scan-related issues
- ATPG.. debug ATPG issues.. debug coverage holes.
- MBIST/BISR insertion.. debug insertion issues / verification issues..
- Gate-level simulations.
Requirements:
- Should work on scan-stitching; posses good knowledge of scan-stitching related concepts..Should work on ATPG; and is well conversed with the files required to run ATPG..
- Knowledge / experience with Tessent ATPG (mentor) is a plus
- Working experience on Spyglass-DFT
- Knowledge on automation scripts like TCL/AWK/SED is a plus..
- Basics of JTAG & IJTAG.
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