DFT Engineer
ACL Digital
2 - 5 years
Bengaluru
Posted: 10/01/2026
Job Description
Should have at least 4+ years of experience in DFT domain
Should be aware of IC level DFT architecture
Should have experience with JTAG, scan insertion, compression, ATPG, boundary scan.
Should have experience with timing & notiming simulations.
Should have experience with memory bist (RAM & ROM).
Should be able to work independently and be a team player
Should have good communication(written and verbal) skills.
Experience with Memory BIST repair flow is a plus
Post silicon debug experience is a plus
Experience with Verilog/VHDL, Synthesis, STA, LEC a plus
Experience with Ultra Low Power Designs , Conformal Low power is a plus.
Analog DFT experience is a plus.
Services you might be interested in
We Search & Apply Jobs for You!
Our team scans through 1000s of opportunities and applies to roles best suited to your profile
Save 100+ hours and focus on what matters - cracking interviews and landing offers.
