Design Verification Lead/Manager (10+ Years) – Bangalore

Job Description: Design Verification Lead/Manager (10+ Years) Bangalore

We are seeking an experienced Design Verification (DV) Lead/Manager to drive verification strategy, methodology, and execution for complex IP/subsystem/SoC designs. The ideal candidate will bring strong technical depth along with proven leadership capabilities.

Key Responsibilities:

• Lead and manage DV teams working on advanced IP/subsystem/SoC verification projects.
• Define verification strategy, planning, architecture, and coverage goals.
• Develop UVM-based verification environments, reusable components, and test scenarios.
• Drive debugging, regressions, flow automation, and verification sign-off.
• Collaborate closely with design, architecture, and validation teams.
• Mentor junior engineers and ensure adherence to best verification practices.

Required Technical Skills:

• Strong hands-on experience with SystemVerilog , UVM , and advanced verification methodologies.
• Deep expertise in at least one or two high-speed protocols , such as:
• PCIe , UCIe , CXL , USB , DDR , SerDes , MIPI , Ethernet , UFS , SD/eMMC
• Experience with C-SV/UVM verification and low-power verification (UPF ).
• Good understanding of Coresight/Debug architecture.
• Strong debugging skills using tools like Verdi, DVE, or SimVision.

Preferred Skills:

• Experience leading DV teams or managing project deliveries.
• Knowledge of formal verification, assertions (SVA), and coverage methodologies.
• Experience with simulators like VCS, Xcelium, or Questa.

Experience:

• 10+ years in Design Verification.
• Prior experience as a Lead/Manager is strongly preferred.

Location:

• Bangalore, India

How to Apply:

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