Design Verification Engineer

### Job Description: ASIC Design Verification Engineer

**Location:** - Bangalore, Chennai, Hyderabad, Noida, Pune, Coimbatore

**Experience Range:** 5 to 15years

**Key Responsibilities:**

• IP verification Using SV/UVM or SOC Verification using C/SV
• VIP Integration
• Interconnect Protocols: .DDR/PCIe/Mipi/USB/Image Sensing/Ethernet/CXL/Dispalyport/UCI/ Power mgmt.
• SOC Interfaces: GPIO, SPI, I2C, UART (3+)
• High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI or UPF or DDR
• Coverage Closure: Code, Functional and Toggle
• Tools: Synopsys VCS or Cadence Incisive
• Technical Documentation: Testbench Specification, Test Plan Specification
• Good exposure to Scripting skills like Perl or Python or Shell or TCL
• Bachelors in Electronics Engineering is a minimum requirement
• Masters in Electronics or Computer Science Engineering is an added advantage
• 5 to 15 years minimum
• Exposure to working in multi-national environment is required
• Excellent oral and written communication skills is a must.
• An attitude to learn and grow. Adaptability and flexibility are desired

**Senior Verification Engineer:**

- All the qualifications of a Design Verification Engineer.

- Minimum 7 years of experience in IP/SoC verification.

- Demonstrated leadership in verification projects.

- Strong experience in subsystem-level verification and high-speed protocols.

- Proven track record in coverage closure and verification planning.

**Lead Verification Engineer:**

- All the qualifications of a Senior Verification Engineer.

- Minimum 10 years of experience in IP/SoC verification.

- Extensive experience leading verification teams and projects.

- Expertise in multiple verification methodologies and high-speed protocols.

- Strong project management and leadership skills.

**Senior Lead Verification Engineer:**

- All the qualifications of a Lead Verification Engineer.

- Minimum 12 years of experience in IP/SoC verification.

- Experience in managing large verification projects and multiple teams.

- Expertise in formal, functional, GLS, power, and CPU verification.

- In-depth knowledge of verification models and techniques.

**Staff Engineer:**

- All the qualifications of a Senior Lead Verification Engineer.

- Minimum 15 years of experience in IP/SoC verification.

- Significant experience in driving and mentoring large verification teams.

- Recognized as an industry expert in verification methodologies and high-speed protocols.

- Strong strategic vision and ability to influence product development.

**Preferred Skills:**

- Experience with different models of a product.

- Familiarity with advanced verification tools and environments.

- Ability to handle multiple tasks and projects concurrently.

- Strong interpersonal and communication skills.

- Demonstrated ability to mentor and train junior engineers.

**Benefits:**

- Competitive salary and benefits package.

- Opportunity to work on cutting-edge technology and projects.

- Professional development and career advancement opportunities.

- Collaborative and innovative work environment.

**How to Apply:**

Interested candidates should send their resume and cover letter to sushma.siddaroda@tessolve.com Please specify the position you are applying for in the subject line