Design Verification Engineer

Job Title: Design Verification Engineer SoC (Ethernet / PCIe / CXL)

Company: Silicon Patterns

Location: Bangalore, India

Experience: 5+ Years

Job Overview

Silicon Patterns is looking for an experienced Design Verification Engineer with strong expertise in SoC verification and high-speed interface protocols such as Ethernet, PCIe, and CXL. The ideal candidate will work closely with design and architecture teams to verify complex SoC components and ensure high-quality silicon delivery.

Key Responsibilities

• Develop and execute verification plans for SoC/IP blocks.
• Design and implement System Verilog / Verilog based testbenches.
• Develop UVM-based verification environments for high-speed protocols.
• Verify and validate Ethernet, PCIe, and CXL interfaces.
• Create testcases, assertions, and coverage models to achieve coverage goals.
• Perform debugging and root cause analysis of failures.
• Work with design teams to resolve issues and improve design quality.
• Contribute to regression automation and verification infrastructure.
• Track and report verification metrics including functional coverage and bug closure.

Required Skills

• Strong expertise in SoC verification methodologies.
• Proficiency in System Verilog / Verilog.
• Hands-on experience with UVM or similar verification frameworks.
• Good understanding of Ethernet, PCIe, and CXL protocols.
• Experience with functional coverage, assertions, and constrained random verification.
• Familiarity with simulation and debug tools (e.g., VCS, Questa, Xcelium).
• Experience with scripts (Python/Perl/Shell) for automation is a plus.

Preferred Qualifications

• Experience verifying high-speed interface IPs.
• Knowledge of SoC architecture and integration.
• Experience with FPGA prototyping or emulation is an advantage.