Design Verification Engineer - MIPI

Were looking for an experienced Design Verification Engineer with strong hands-on expertise in MIPI (DSI/CSI/UniPro/CPHY/DPHY) and UVM/SystemVerilog-based verification. If you have solid SoC/IP-level DV experience and enjoy solving complex interface challenges, this role is for you.

Key Responsibilities:

• Develop and enhance UVM verification environments for MIPI interfaces (CSI/DSI/DPHY/CPHY).
• Create constrained-random testbenches, assertions, checkers, and functional coverage models.
• Debug protocol, timing, and integration issues across design and architecture teams.
• Drive coverage closure, verification planning, and documentation.
• Work closely with SoC/IP teams on integration, regressions, and debug cycles.

Thanks,

Karthik Kumar