🔔 FCM Loaded

Design Verification Engineer

Best NanoTech

2 - 5 years

Bengaluru

Posted: 20/12/2025

Getting a referral is 5x more effective than applying directly

Job Description

Position: Senior DV Engineer



Were looking for an experienced DV engineer to lead SOC Design Verification for complex, high-performance projects.


About the Role


Experience - 7+ Years


Location - Pune/Bangalore/Ahmedabad


Responsibilities



  • Drive SOC verification execution and ensure successful delivery of verification plans.
  • Develop and implement robust verification strategies, test plans, and test benches.
  • Verify high-speed SOCs and protocols including PCIe, Ethernet, CXL, MIPI, DDR, HBM, and low-speed interfaces like I2C/I3C, SPI, UART, GPIO, QSPI.
  • Work with gate-level simulations, power-aware verification, Xprop, and UPF (nice to have).
  • Develop and analyze SystemVerilog assertions and coverage (code, toggle, functional).
  • Show strong ownership, work ethic, and commitment to timelines.



Qualifications


Engineering And Equivalent


Pay range or salary or compensation as per market standard.

Services you might be interested in

Improve Your Resume Today

Boost your chances with professional resume services!

Get expert-reviewed, ATS-optimized resumes tailored for your experience level. Start your journey now.