Design Verification Engineer
ACL Digital
2 - 3 years
Hyderabad
Posted: 12/02/2026
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Job Description
Experience: 2-3 Years
Location: Hyderabad
Education: B.E./B.Tech. in ECE/EEE or M.E./M.Tech. in VLSI/Electronics
Roles and Responsibilities
- Strong expertise in UVM-based verification.
- Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.
Share resumes at raksha.k@acldigital.com
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