Application Specific Integrated Circuit Design Engineer
ACL Digital
2 - 5 years
Hyderabad
Posted: 30/12/2025
Job Description
ASIC Design Engineer
Location: Hyderabad
Experience: 510 years
Job Description
Key Responsibilities:
- Develop and implement RTL design for complex ASIC SoCs/IPs .
- Work on micro-architecture design, coding (Verilog/SystemVerilog ), and RTL integration .
- Perform design synthesis , lint , CDC/RDC checks, and timing closure.
- Collaborate with verification, physical design, and architecture teams to ensure first-pass silicon success.
- Debug design issues at block and SoC level, support verification and post-silicon validation.
- Contribute to low-power , high-performance design techniques for advanced technology nodes.
Required Skills:
- Strong expertise in RTL design using Verilog/SystemVerilog.
- Hands-on experience with ASIC flow: synthesis, STA , constraints , ECO .
- Knowledge of standard protocols (AXI, AHB, PCIe, DDR, Ethernet , etc.).
- Familiarity with power intent (UPF/CPF ) and clock /power domain crossings.
- Experience in working with EDA tools (Synopsys /Cadence /Mentor ).
- Good problem-solving and debugging skills.
About Company
ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.
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