Analog Layout Engineer

Analog Layout Engineer

Experience: 47 years

Location: Hyderabad

NP- Max 15 Days

Note: This position is open to experienced engineers only.

Analog/custom layout design in advanced CMOS process.

Expertise in Cadence VLE/VXL and Calibre DRC/LVS is a must.

Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,

Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)

Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,

Ability to understand design constraints and implement high-quality layouts.

Excellent command and problem-solving skills in Physical layout verification.

Good understanding of basic active and passive devices such as R,L,C and MOSFETs

Interested candidates can share resume to